MSE Master of Science in Engineering

The Swiss engineering master's degree


Ogni modulo equivale a 3 crediti ECTS. È possibile scegliere un totale di 10 moduli/30 ECTS nelle seguenti categorie: 

  • 12-15 crediti ECTS in moduli tecnico-scientifici (TSM)
    I moduli TSM trasmettono competenze tecniche specifiche del profilo e si integrano ai moduli di approfondimento decentralizzati.
  • 9-12 crediti ECTS in basi teoriche ampliate (FTP)
    I moduli FTP trattano principalmente basi teoriche come la matematica, la fisica, la teoria dell’informazione, la chimica ecc. I moduli ampliano la competenza scientifica dello studente e contribuiscono a creare un importante sinergia tra i concetti astratti e l’applicazione fondamentale per l’innovazione 
  • 6-9 crediti ECTS in moduli di contesto (CM)
    I moduli CM trasmettono competenze supplementari in settori quali gestione delle tecnologie, economia aziendale, comunicazione, gestione dei progetti, diritto dei brevetti, diritto contrattuale ecc.

La descrizione del modulo (scarica il pdf) riporta le informazioni linguistiche per ogni modulo, suddivise nelle seguenti categorie:

  • Insegnamento
  • Documentazione
  • Esame
Design of Embedded Hardware and Firmware (TSM_EmbHardw)

This module introduces the student to advanced concepts in modern embedded systems engineering. The module is divided into two sections. The first section is practical/theoretical and is designed to get the student familiar with implementing System on Chip (SoC) designs. The second part discusses formal Hardware/Software Co-Design including design and implementation of advanced embedded architectures as well as the verification and test of the resulting system.  

Requisiti

The students have a working knowledge of programming embedded systems in C.
The students have a working knowledge of basic hardware design including VHDL coding

Obiettivi di apprendimento

  • The student will know some of the forces driving the design of modern embedded architectures.
  • The student will understand and be able to apply the V-Model and structured HW/SW Co-Design methodologies including strategies for the verification and test of embedded systems.  
  • The student will be able to design and implement complete SoC designs including using soft-core microprocessors and IP cores in an FPGA.
  • The student will be able to apply loop optimisations using both SW techniques and optimised cache in single- and multi-processor architectures.
  • The students will be able to understand and apply pipeline architectures in processors (super-pipelined, superscalar), HW and SW.

 

Contenuti del modulo

  • Introduction
    • V-Model, specification and test
    • HW-SW Co-Design
  • SoC design, implementation and test
    • FPGA technology, SoC design, soft-core processors, design, implementation and reuse of custom IP cores
    • Bus systems
  • Optimisation Strategies
    • Advanced peripherals, DMA, scheduling
    • Software loop optimisations, custom instructions, co-processors,
    • Memory hierarchy (cache, scratch pad memories ) 
    • Pipeline, multiprocessing
  • Review
    • Exercises and laboratories using an FPGA board

Metodologie di insegnamento e apprendimento

Lectures
Accompanied exercises
Self-study

Bibliografia

No mandatory literature

Scarica il descrittivo completo del modulo

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